DC to DC voltage doubler circuit diagram with components operation and design tips

dc to dc voltage doubler circuit diagram

Use a two-stage charge-pump arrangement when a low DC source must be raised to roughly twice its input potential without magnetic components. The layout typically combines two fast switching diodes and two storage capacitors connected so that one capacitor charges from the supply while the second stacks its stored potential on top of the source during the next switching phase. With a 5 V input, the output node often reaches 9–10 V under light load, depending on diode drop and ripple.

The schematic normally includes a pulse source that alternates the charging path. During phase A, capacitor C1 fills from the input rail through diode D1. During phase B, the stored charge in C1 is placed in series with the supply and pushes current through D2 into capacitor C2. This stacked potential appears at the output node. Low-loss Schottky diodes (forward drop about 0.2–0.35 V) reduce energy loss and help the output approach the theoretical ×2 level.

Capacitor values strongly affect ripple and current capability. For small loads below 20 mA, designers frequently select 10–47 µF capacitors. Higher current demand requires larger storage, often 100 µF or more, while switching frequency between 20 kHz and 200 kHz keeps ripple manageable and limits capacitor size. Output ripple can be estimated using ΔV ≈ I / (f × C), where I represents load current, f the switching rate, and C the output capacitor.

Layout decisions influence performance. Keep diode paths short, place capacitors close to switching nodes, and minimize trace resistance. When the input source provides only 3–6 V, careful component choice allows the stage to deliver nearly double the supply potential while maintaining compact size and low component count.

How to build a basic DC to DC voltage doubler circuit using diodes and capacitors

Use two fast switching diodes such as 1N4148 and two electrolytic capacitors rated at least twice the input potential; connect the first capacitor between the pulse source output and ground, then place the first diode so current flows from the source into that capacitor during the positive swing. The second diode routes stored charge toward the output storage capacitor, stacking electrical potential from two charge phases.

The method relies on a pulsed input rather than steady direct supply. Feed the stage from a square-wave generator (5–50 kHz works well) produced by a small inverter IC like 74HC14 or a simple transistor oscillator. During the high phase the first capacitor fills to the source level; during the low phase its stored charge shifts through the second diode and adds to the supply potential across the output capacitor.

Component arrangement

Place diode D1 with its anode toward the pulse source and its cathode toward capacitor C1. Connect C1 from that node to ground. Attach diode D2 with its anode at the same node and its cathode toward capacitor C2. The second capacitor connects from the cathode of D2 to ground and becomes the boosted output reservoir. Under pulsed operation, C2 accumulates roughly twice the source potential minus two diode drops.

Select capacitor values between 10 µF and 470 µF depending on load demand. Small loads such as sensor modules or analog stages operate well with 22–47 µF parts. Larger capacitance reduces ripple because C2 discharges more slowly between switching cycles.

Practical construction notes

dc to dc voltage doubler circuit diagram

Use low-leakage capacitors and keep leads short on the breadboard or PCB. Excess trace length adds stray resistance and inductance that reduce transferred charge each cycle. Schottky diodes like BAT54 lower the forward drop, raising the final output level by roughly 0.2–0.3 V compared with silicon types.

Measure the output with a multimeter while gradually increasing load current through a resistor. As load grows, the stored charge in C2 drains faster between pulses and the output level falls. For example, with a 5 V pulse source and 47 µF capacitors, a 10 kΩ load may produce about 8.6–9 V, while a 1 kΩ load might drop the result closer to 7 V.

Add a small ceramic capacitor (100 nF) in parallel with the output reservoir to suppress high-frequency ripple from the switching source. If the oscillator runs above 20 kHz, audible noise disappears and energy transfer becomes smoother, producing a steadier elevated DC output suitable for light electronics.

How to calculate capacitor and diode ratings for a DC step-up charge-pump stage

Select capacitor capacitance from ripple tolerance and load current. Use the relation C ≥ I_load / (f × ΔV_ripple), where f is switching or input frequency and ΔV_ripple is the allowed ripple amplitude at the output node. For example, with I_load = 40 mA, f = 50 kHz, and ripple limit 0.2 V, the result is C ≥ 0.04 / (50000 × 0.2) ≈ 4 µF; practical designs use 10–22 µF ceramic parts to reduce ESR effects. The dielectric must support a potential rating at least 2.5× the input peak because each storage element periodically charges close to the peak level and may experience brief overshoot caused by diode recovery and wiring inductance. Low-ESR MLCC or polymer capacitors limit ripple heating. ESR loss estimate: P ≈ I_ripple² × ESR; keep this below about 10–15% of the component’s dissipation capability to avoid temperature rise.

Diode rating selection

Rectifier parts must tolerate reverse stress approaching twice the peak input level because one device blocks the charged capacitor plus the incoming waveform. Choose reverse capability ≥ 2.2× V_peak for margin against spikes.

  • Reverse blocking level: ≥ 2.2 × V_peak of the source.
  • Forward current: ≥ 1.5 × expected load current to handle charge pulses.
  • Surge capability: ≥ 5–10 × I_load for startup charging.
  • Forward drop: Schottky types (0.2–0.4 V) reduce loss when input amplitude is low.
  • Recovery time: for switching frequencies above ~20 kHz, select fast or Schottky devices; slow rectifiers increase ripple and heating.

Example: with 12 V peak input and 60 mA load, choose diodes rated ≥30 V reverse, ≥0.1 A average forward current, and ≥1 A surge. Common small Schottky parts such as 40 V / 1 A devices provide sufficient margin for most compact charge-pump multiplier stages.